Microstrip and stripline impedance calculator

A 50 Ω microstrip over a 6 mil FR-4 prepreg is 9.6 mil (0.24 mm) wide. On a 1.6 mm two-layer board, 50 Ω takes a 2.99 mm trace. Height to the plane sets the width; IPC-2141 gives both at ε_r = 4.3 and 1 oz copper. The fit holds for W/H from 0.1 to 2 and ignores solder mask, which lowers Z₀.

Characteristic impedance of a surface trace over a plane or a buried trace between two, the differential impedance of an edge-coupled pair, and the width that lands on a target — plus how long a signal takes to get down an inch of it.

Fig 1 — Edge-coupled microstrip: 48.6 Ω single-ended, 79.3 Ω differential.

Line

Solve for

Trace width W (mil)

Dielectric height H (mil)

Copper thickness T (mil)

Dielectric constant (εr)

Pair spacing S (mil)

Z₀ (single-ended): 48.6 Ω
Z diff (pair): 79.3 Ω
εr effective: 2.712 (IPC) · 3.239 (Hammerstad)
Propagation delay: 140.0 ps/in · 5.51 ps/mm
Velocity: 0.607 c
W / H ratio: 1.75

How this is calculated

Standard: IPC-2141A — controlled impedance circuit boards

$Z_0 = \frac{87}{\sqrt{\varepsilon_r + 1.41}} \cdot \ln\!\left( \frac{5.98h}{0.8w + t} \right)$: Microstrip, valid for w/h between 0.1 and 2.
$\varepsilon_{eff} = 0.475 \cdot \varepsilon_r + 0.67$: Microstrip effective permittivity. The Hammerstad–Jensen value is shown alongside it.
$Z_{diff} = 2 \cdot Z_0 \cdot \bigl(1 - 0.48 \cdot \exp(-0.96 \cdot s/h)\bigr)$: Edge-coupled microstrip pair.
$Z_0 = \frac{60}{\sqrt{\varepsilon_r}} \cdot \ln\!\left( \frac{4h}{0.67\pi \cdot (0.8w + t)} \right)$: Stripline, valid for w/h under 0.35 and t/h under 0.25.
$Z_{diff} = 2 \cdot Z_0 \cdot \bigl(1 - 0.374 \cdot \exp(-2.9 \cdot s/h)\bigr)$: Edge-coupled stripline pair.
$t_{pd} = 85 \cdot \sqrt{\varepsilon_{eff}}$: Propagation delay in ps per inch. The width for a target Z_0 is found by bisection.

Assumptions

Surface microstrip over a solid, uninterrupted reference plane.
Curve fits, not a field solution — expect a few percent of error.
Microstrip valid for w/h between 0.1 and 2.0; stripline for w/h under 0.35 with the trace centred between the planes.
Assumes a homogeneous dielectric; FR-4 varies with weave and frequency.
No allowance for solder mask, which lowers Z_0; fabricators often multiply the bare figure by 0.94–0.96, about 2–3 ohms off a 50 ohm line.
Your fabricator’s stackup and etch tolerance matter more than this number.

What sets a trace's characteristic impedance

The characteristic impedance of a trace from its geometry, using the closed-form equations in IPC-2141A (Design Guide for High-Speed Controlled Impedance Circuit Boards, Section 4). These are curve fits to field-solver output from the 1990s, good to a few percent inside their fitted range and increasingly wrong outside it.

Surface microstrip — a trace on an outer layer over one reference plane — is the first group under How this is calculated above: impedance, effective permittivity, the edge-coupled differential pair, and propagation delay in picoseconds per inch. Throughout, W is the trace width, H the dielectric height to the plane, T the copper thickness and S the edge-to-edge gap of a pair. That delay is the input thecritical length calculator needs to decide whether a trace is long enough to require terminating at all.

Symmetric stripline — a trace centred between two planes — is the second group, and there H is the plane-to-plane spacing rather than trace-to-plane.

Stripline has no air above it, so the effective dielectric constant is just εr and the line is slower than a microstrip on the same laminate. The differential correction factor decays faster (2.9 vs 0.96) because the planes on both sides screen the coupling.

Solve for width. Both forms are Z₀ = K · ln(N / (0.8W + T)), with N = 5.98H for microstrip and 4H/(0.67π) for stripline, so the inversion is exact: 0.8W + T = N / e^(Z0/K). Z₀ falls monotonically with width, so that root is unique where it exists, and the tool reaches it by bisection rather than by the algebra — one code path serves both line types, and it can report honestly when a target impedance is outside what the stackup can produce.

The differential result is then reported at the width found and the spacing you entered; it does not iterate on the spacing.

Microstrip width chart: 50 Ω and 75 Ω on FR-4

The trace width for the two single-ended impedances that matter, for the dielectric heights common stackups put under an outer layer, computed by the calculator above from the IPC-2141 closed form at ε_r = 4.3 with 1 oz copper. The 63 mil row is a plain two-layer board, and it is why 50 Ω on one is a trace three millimetres wide. At the other end, a width of two or three mils is the formula's answer, not a fab's: 75 Ω on a 4 mil prepreg is not a trace anyone can buy.

Height to plane	Width for 50 Ω	Width for 75 Ω
4 mil (0.10 mm)	5.9 mil (0.15 mm)	2.1 mil (0.05 mm)
6 mil (0.15 mm)	9.6 mil (0.24 mm)	4.0 mil (0.10 mm)
8 mil (0.20 mm)	13.4 mil (0.34 mm)	5.9 mil (0.15 mm)
10 mil (0.25 mm)	17.2 mil (0.44 mm)	7.8 mil (0.20 mm)
14 mil (0.36 mm)	24.8 mil (0.63 mm)	11.6 mil (0.30 mm)
20 mil (0.51 mm)	36.1 mil (0.92 mm)	17.3 mil (0.44 mm)
40 mil (1.02 mm)	74.0 mil (1.88 mm)	36.4 mil (0.92 mm)
63 mil (1.60 mm)	117.5 mil (2.99 mm)	58.3 mil (1.48 mm)

Worked example: 10 mil microstrip over 6 mil FR-4

Microstrip: 10 mil trace, 6 mil FR-4 prepreg (εr = 4.3), 1 oz copper (1.378 mil), 8 mil gap for the pair.

0.8·W + T   = 8 + 1.378 = 9.378
5.98·H      = 35.88
ratio       = 35.88 / 9.378 = 3.826
ln(3.826)   = 1.342
√(εr+1.41)  = √5.71 = 2.390
87 / 2.390  = 36.41
Z0          = 36.41 · 1.342 = 48.9 Ω

εr_eff      = 0.475 · 4.3 + 0.67 = 2.713
t_pd        = 85 · √2.713 = 85 · 1.647 = 140 ps/in

S/H         = 8 / 6 = 1.333
e^(−0.96 · 1.333) = e^(−1.28) = 0.278
1 − 0.48 · 0.278  = 0.867
Zdiff       = 2 · 48.9 · 0.867 = 84.7 Ω

W/H = 1.67, inside the fit. To hit 50 Ω exactly on this stack the solver goes the other way:

Z0 / K      = 50 / 36.41 = 1.373
e^1.373     = 3.948
35.88 / 3.948 = 9.087
W           = (9.087 − 1.378) / 0.8 = 9.64 mil

Stripline on the same board: 5 mil trace centred between planes 20 mil apart, εr = 4.2, 1 oz copper, 8 mil gap.

0.8·W + T      = 4 + 1.378 = 5.378
0.67·π · 5.378 = 11.32
4·H / 11.32    = 80 / 11.32 = 7.067
ln(7.067)      = 1.955
60 / √4.2      = 60 / 2.049 = 29.28
Z0             = 29.28 · 1.955 = 57.2 Ω

S/H            = 8 / 20 = 0.4
e^(−2.9 · 0.4) = e^(−1.16) = 0.313
1 − 0.374 · 0.313 = 0.883
Zdiff          = 2 · 57.2 · 0.883 = 101 Ω

W/H = 0.25, inside the stripline fit's W/H < 0.35 limit. At 8 mil gap the pair is weakly coupled and Zdiff is close to 2·Z0; tighten to a 5 mil gap and it drops to 94 Ω.

Where the IPC-2141 equations stop being valid

Microstrip: 0.1 < W/H < 2.0 and 1 < εr < 15. The tool flags anything outside that. Below W/H = 0.1 the fit undershoots; above 2 it overshoots, and the logarithm goes negative once 0.8W + T exceeds 5.98H — a 40 mil trace over 4 mil prepreg returns a negative impedance, which the tool refuses to present as a number.
Thin dielectrics. Under about 4 mil the copper thickness term (0.8W + T) starts dominating and the equation loses several ohms against a field solver. Modern 4-layer stackups with 3–4 mil prepreg under the outer layers sit right at this edge; expect the IPC form to read 2–4 Ω high for a 50 Ω line.
Stripline: W/H < 0.35 and T/H < 0.25. Wide traces between closely spaced planes are outside the fit. Asymmetric stripline (trace nearer one plane, the usual case in a 6-layer board) needs the separate IPC-2141 asymmetric equation or a solver; the symmetric form is optimistic there.
The εr_eff line is a linear fit. 0.475·εr + 0.67 ignores W/H entirely. Hammerstad–Jensen gives the geometry-dependent value; the difference is a few percent in delay, which matters for length matching at DDR speeds, not for whether the line is 50 Ω.
Solder mask, weave and frequency. Mask over a microstrip lowers Z0. Fabricators often take the bare-microstrip figure and multiply it by 0.94 or 0.96, which puts a 50 Ω line at 47–48 Ω. FR-4's εr is 4.5 at 1 MHz and closer to 4.0 at 5 GHz and varies with glass style and resin content; your fab's stackup sheet gives the number they actually measured. Coated microstrip has its own IPC-2141 correction the tool does not apply.
Use a solver when the number has to be right. The free ones are good: the KiCad PCB Calculator (transmission-line tab, from the Transcalc code), Saturn PCB Toolkit, and every serious fab's online stackup tool. The fab's tool is the one to trust, because they will adjust the trace width at CAM to hit your impedance anyway; what you need from this page is a width within 10–20 % of the answer so the layout does not have to be redone.

Common impedance calculation mistakes

Stripline H. The equation wants plane-to-plane spacing. Entering the trace-to-nearest-plane distance halves H and reports an impedance 20 Ω low.
Using nominal copper thickness for outer layers. Outer copper is plated up; a "1 oz" outer layer is often 1.7–2 mil finished. Inner layers are the foil weight as stated. A mil of extra T moves a 50 Ω microstrip by about 1.5 Ω.
Reference plane that isn't one. The formula assumes a solid plane directly under the trace. Routing over a split, a slot, or a power plane with cutouts changes Z0 and, worse, the return path. Check the layer below before trusting the number.
Differential impedance without thinking about coupling. A 100 Ω pair at S/H = 2 is two 50 Ω lines that barely notice each other, which is fine for USB and poor for anything where common-mode rejection matters. Tightly coupled (S ≈ W) needs narrower traces to hold 100 Ω; the tool does not re-solve W for a target Zdiff.
Chasing the third digit. Etch tolerance is ±0.5–1 mil, prepreg thickness ±10 %, εr ±0.2. A controlled-impedance spec of ±10 % is normal; ±5 % costs extra and needs coupon testing. Pick a width, round it to something the fab likes, and write the impedance on the drawing.
Mixing mils and mm. The equations are ratios so any consistent unit works, but 1.378 mil of copper next to a 0.15 mm height is a common way to get a nonsense answer.