100nF

Ethernet magnetics: what the transformer and centre tap do

The transformer between a PHY and its RJ-45 gives 1500 V of isolation and common-mode rejection; the centre-tap resistors are Bob Smith termination.

Between every Ethernet PHY and its RJ-45 jack there is a block of transformers, and around it a cluster of 75 Ω resistors, a high-voltage capacitor and, on most modern parts, a common-mode choke per pair. It is not optional and it is not a filter someone added for luck. Microchip’s magnetics guide puts it plainly: “while not explicitly required by IEEE 802.3, magnetics are the most commonly used method of meeting the requirements of the 10/100/1000BASE-T PMA electrical interface”, and they do several jobs at once — “electrical isolation, signal balancing, common-mode rejection, impedance matching, and EMC improvement”. This article is what each part of the block does, from TI’s PHYTER guide, Microchip’s magnetics guide and layout note, and Würth’s Gigabit front-end reference design, and the four layout rules that follow.

What the transformer is for

The first job is safety. “For human safety, the IEEE specification requires a 10/100/1000BASE-T port to be able to withstand 1,500 VAC at 50 Hz to 60 Hz for 1 minute between ports or from each port to the chassis ground. Transformers can easily and inexpensively meet this isolation requirement.” Würth’s design note gives the same figure for its part: “the minimum test voltage for the transformer between primary and secondary is 1,500 VRMS”, and adds why it matters beyond the lab — the transformer “prevents voltage offsets that can arise due to potential differences between the devices”. Two boxes on two mains outlets are two different grounds; the cable would otherwise join them.

The second job is the balance. Each pair of the cable is a balanced transmission line, “an unshielded twisted pair (UTP) has an impedance of 100 Ω”, and a 1:1 transformer “simply and easily provide[s] the balanced connection to each pair of a cable and can also provide a very effective rejection of common-mode signals”. That rejection works “in both signal directions of a port”: noise the cable picks up from its surroundings is kept out of the PHY, which “improves the signal-to-noise ratio of the system”, and noise the board couples onto the traces between the PHY and the magnetics is kept off the cable — which matters because “10/100/ 1000BASE-T uses unshielded twisted pair cables, the cables radiate any common-mode noise that is coupled through the magnetics and onto the cables”. Most EMC failures at an Ethernet port are that sentence.

Schematic of one Ethernet pair from the PHY to the RJ-45 jack. The PHY transmit pins have 49.9 ohm resistors to a decoupled supply. They feed the primary of a 1-to-1 transformer whose centre tap goes to ground through a capacitor. The secondary centre tap goes through a 75 ohm resistor to a star point shared with the other three pairs, and from the star a high-voltage capacitor to chassis ground. The secondary passes through a common-mode choke to the jack.
Fig 1 — One of the four pairs, as AN-1469's figure 2 and RD016's figure 1 draw it. On the PHY side, 49.9 Ω terminations to a decoupled supply and a centre tap that is "AC connected to ground via capacitors"; the 1:1 transformer that meets the IEEE 1500 V isolation requirement; on the cable side, the centre tap into the Bob Smith star — "for each wire pair, a 75 Ω resistor is connected to form a star point, the whole circuit is then galvanically isolated and connected to the chassis ground" by a capacitor "with a dielectric strength of at least 2 kV" — and the common-mode choke next to the jack.

The ratio is 1:1 and the tolerance matters: “winding tolerances affect amplitude step-up/step-down from the primary to secondary side of the transformer, and should remain within ± 2 % for adequate margin in amplitude template tests”. On the PHY side, TI’s guide puts “the 49.9 ohm, 1 % resistors, and 0.1 µF decoupling capacitor, near the PHYTER TD+/− and RD+/− pins”, and the transformer’s “PHY-side center tap … should connect through a capacitor to ground” (Microchip) — “AC connected to ground via capacitors” in Würth’s words, “to avoid DC equalization currents from the PHY”.

The centre tap and Bob Smith’s 75 Ω

The cable-side centre taps are where the odd resistors live. Every note describes the same network: “the center tap of the isolated winding has ‘Bob Smith’ termination through a 75 ohm resistor and a 1000 pF cap to chassis ground. The termination capacitor should be rated to a voltage of at least 2 kV” (TI). Würth: “for each wire pair, a 75 Ω resistor is connected to form a ‘star point’, the whole circuit is then galvanically isolated and connected to the chassis ground by means of two parallel 100 pF capacitors; capacitors up to 2 nF are mentioned in the literature”.

What it terminates is not the pair. Microchip explains the idea: “Robert (Bob) W. Smith’s patented idea proposes a way to reduce the common-mode currents on a multi-pair system (for example, CAT5 network cable). It is based on the fact that the pair-to-pair relationships of a CAT5 cable form transmission lines in themselves.” Each pair, taken as a whole against the others, is a transmission line of its own — Würth: “Bob Smith referenced an impedance of about 145 Ω per wire pair” — and “providing those pair-to-pair transmission lines with termination matching their characteristic impedance in order to absorb the reflected wave and prevent the standing wave from occurring significantly lowers parasitic interference radiation”. The 75 Ω from each centre tap to the common star is that termination; the capacitor “between the common point of all the four resistors and the chassis ground is not a part of Bob Smith termination, but helps in filtering the noise residue managing to leak out through the transformer”, and its 2 kV rating is because it sits across the isolation barrier. TI’s summary of what it buys: it reduces “noise resulting from common mode current flows, as well as … susceptibility to any noise from unused wire pairs on the RJ-45”.

Two exceptions. Power over Ethernet puts DC on the pairs, so “the Bob Smith termination resistors must be isolated from the power system’s DC voltage reference using DC-blocking capacitors. Ceramic capacitors in the 10 nF range are sufficiently small values so as to not perturb the pair-to-pair impedance matching” — TI simply notes that the plain termination “does not apply for Power Over Ethernet”. And the centre taps should not be ganged: “the magnetic should route out the transformer center-taps on individual pins so each can be individually AC-coupled. Ganged connections of multiple center-taps, whether connected directly or by chokes, are not recommended.”

The choke, and 8-core against 12-core

Because real cables are not the ideal Bob Smith assumed — “due to the wealth of cable types on the market, the differences in the base impedances of the various cable types, and the fact that the cables do not have a constant impedance over the length caused by twisting, common-mode chokes were also implemented” (Würth) — the magnetics carry a common-mode choke per pair. “These chokes cannot correct impedance matching deviations, but they do significantly improve EMC.” Microchip describes its purpose as attenuating common-mode noise in both directions: the system’s own, “where the CMC decreases the electromagnetic emission”, and the outside world’s, “where the CMC improves the electromagnetic immunity”. TI’s EMI list starts with it: “use magnetics with integrated common mode choking devices.”

Two schematics of one pair of Ethernet magnetics. Left, 8-core: a transformer and a common-mode choke on the cable side. Right, 12-core: a transformer, a common-mode choke, and an auto-transformer whose centre tap goes to the Bob Smith termination.
Fig 3 — Microchip's two families. "8-core magnetics consist of a transformer and a CMC"; "12-core magnetics consist of transformer, a common-mode choke, and an auto-transformer", where "the auto-transformer presents high impedance to the differential signal in the twisted pair, as though not existing for it, but very low impedance to the common-mode currents flowing to the Bob Smith termination". The guide's verdict: "8-core magnetics are cheaper but riskier … 12-core magnetics make the design process much easier", and the choke belongs on the cable side.

Microchip sorts the parts by core count. “8-core magnetics consist of a transformer and a CMC”; 12-core parts add an auto-transformer that “presents high impedance to the differential signal in the twisted pair, as though not existing for it, but very low impedance to the common-mode currents flowing to the Bob Smith termination”. Its advice is candid: “8-core magnetics are cheaper but riskier, and so are cautiously recommended to skilled designers. 12-core magnetics make the design process much easier without demanding extensive experience in the layout art, especially if the Ethernet module is a part of a system with a big digital section that generates a lot of noise.” Where the choke sits matters too: compliance testing “has reduced margin in the PHY-side CMC location compared to the cable-side CMC”, so “future designs avoid” the PHY-side choke. And PoE parts have no auto-transformer at all: “PoE magnetics offerings are limited to one choke for common-mode rejection.”

Integrated in the jack, or discrete

The magnetics come either as a module beside the jack or built into it. Microchip weighs the two. Integrated: “a lower component count”, “better EMC shielding of the sensitive cable-side signals by the metal shield”, “smaller footprint” — but “harder to rework”, and “due to the space limitations, the magnetics cores are smaller and closer to each other, which degrades crosstalk and EMC characteristics and increases nonlinear distortion and losses”; the small module means “a greater risk that the noise is coupled between the cable side and the PHY side of the magnetics, thereby limiting the common-mode choke effectiveness”. Discrete: “lower coupling between the different parts inside the magnetics, and this results in better common-mode filtering”, but “once the signals have been filtered by the magnetics, they are routed to the connector on the PCB and careless routing of the medium-dependent interface (MDI) traces adjacent to noise sources on the PCB can couple and consequently create EMC problems”. Würth built its reference design both ways, “V1.0” discrete and “V2.0” integrated, and ships the integrated one.

Where it goes on the board

Microchip’s SMSC layout note is the set of rules most PHY vendors repeat, and TI’s guide agrees on each.

Plan view of a board edge with an RJ-45 jack on it, a magnetics module inland from the jack, and a PHY further inland. Dimension lines mark: PHY to magnetics at least 25 millimetres; magnetics to jack under 25 millimetres; the PHY and its pairs at least 25 millimetres from the board edge. The region under the magnetics and the jack is hatched as having no ground plane, and the chassis ground of the jack is separated from the system ground by a gap bridged by two zero-ohm resistors.
Fig 2 — Microchip AN 18.6's distances: "the distance between the PHY and the magnetics needs to be 25 mm (approx. 1 inch) or greater", a rule that "among PHY vendors … is considered good design practice for EMI"; a discrete magnetic "kept to under 25 mm" from the jack; the PHY and its pairs "at least 25 mm from the edge of the PCB". And the plane rule from both notes: "under no circumstances should a ground plane exist under the magnetics, the RJ45 connector, or in between", with chassis and system grounds kept apart and bridged, per AN-1469, by "two size 1206 zero ohm resistors across the void".
  • Distance. “The distance between the PHY and the magnetics needs to be 25 mm (approx. 1 inch) or greater. Among PHY vendors, the 25 mm rule is considered good design practice for EMI considerations. The intention is to isolate the PHY from the magnetics.” A discrete magnetic to its jack, the other way: “kept to under 25 mm”. And “keep the PHY device and the differential transmit pairs at least 25 mm from the edge of the PCB”.
  • No plane under the cable side. “In general, no ground plane should extend under the TX and RX differential pairs, under the magnetics, or under the RJ45 jack. … Under no circumstances should a ground plane exist under the magnetics, the RJ45 connector, or in between the magnetics and RJ45 connector.” The isolation barrier is only as good as the gap under it. TI: “do not overlap the circuit and chassis ground planes, keep them isolated. Connect chassis ground and system ground together using two size 1206 zero ohm resistors across the void between the ground planes on either side of the RJ-45” — footprints that “can be removed or replaced with alternative components (that is, capacitors or EMI beads) during system level certification testing”. Würth fits the capacitors for a plastic housing and screws the ground to a metal one.
  • The pairs. TI: 100 Ω differential, “no crossover or via on the signal paths”, “matched in length”, never across a plane split, no stubs. The microstrip impedance calculator is the width and spacing; the 49.9 Ω resistors go at the PHY pins.
  • The extras, close to the magnetics. Common-mode capacitors on the pairs, “between 10 pF and 22 pF”, “within 10 mm (approx. 400 mils) of the magnetics” — and if they are used, a ground plane may run under the pairs “however the plane must not extend beyond the capacitors”. Extra chokes “within 10 mm of the integrated RJ45 module”. TVS arrays on the PHY side of the transformer, where “the interference level is lower”, with “low impedance connection of the diodes” (Würth); the TVS clamping calculator is that part.
  • The shield. The jack’s shield tabs “must be connected directly, i.e., with low impedance (!) to the chassis ground. This connection is crucial for the shield connection of the cable and thus for the ‘quality’ of the shielding attenuation.”

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