Tag
signal integrity
6 articles.
- USB 2.0 layout: 90 Ω differential, and where the TVS goes
The impedance, the length match, the capacitance budget and the order of the protection parts — with the numbers and the documents each one comes from.
- How to terminate a clock line: series, parallel or nothing
When a clock line needs no termination, when one series resistor at the driver is enough, and the exact networks LVDS, LVPECL and HCSL clocks need.
- Reflections you can see: when a trace becomes a transmission line
The rule is not length, it is rise time. TI's rule is four times the one-way delay: below it a trace is a wire, above it each unterminated end is a mirror.
- RS-485 termination: when 120 Ω helps and when it just costs you
Where the 120 Ω comes from, the loop-time test that decides if you need it, AC termination as a data-rate trade, and how failsafe bias eats your node budget.
- The via is the decoupling: 40 dB from layout alone
Würth built one board with the same ferrite and the same two 100 nF capacitors in every channel, and changed only the layout. The worst channel is 40 dB down.
- Why 100 nF, and the frequency where it stops being a capacitor
The value is inherited, not derived. What decides if a decoupling capacitor works is its inductance, and above a few tens of megahertz 100 nF is an inductor.