Op-amp DC error budget calculator

How far from the ideal output a real op amp is allowed to sit: offset voltage, its drift over temperature, and the bias currents working through the actual resistor network, stacked worst-case and referred to both the input and the output.

Fig 1 — worst case referred to the input: 86.7 µV, riding a noise gain of 101 to 8.76 mV at the output.

Feedback resistor RF (kΩ)

Gain resistor RG (kΩ)

Source resistance RS (kΩ)

Offset voltage, max (µV)

Offset drift, max (µV/°C)

Temperature excursion (°C)

Bias current, max (nA)

Offset current, max (nA)

Total DC error, input-referred: ±86.7 µV worst case
At the output: ±8.76 mV (noise gain 101.0)
Offset voltage term: ±50.0 µV at 25 °C
Drift term: ±30.0 µV over a 60 °C excursion
Bias-current term: ±6.70 µV (the two splits give -2.31 and -6.70 µV)
Balancing resistance RF∥RG: 990 Ω — an RS matching it cancels the matched part of the bias currents

How this is calculated

Standard: TI SBOA590 — Op Amp Offset Voltage and Bias Current Limitations

$V_{IB1} = \left(I_B + \tfrac{I_{OS}}{2}\right) (R_F \| R_G) - \left(I_B - \tfrac{I_{OS}}{2}\right) R_S$: SBOA590 Equation 21: the two input bias currents are IB ± IOS/2; the inverting one works against RF∥RG, the non-inverting one against the source resistance, and their polarities oppose.
$V_{IB2} = \left(I_B - \tfrac{I_{OS}}{2}\right) (R_F \| R_G) - \left(I_B + \tfrac{I_{OS}}{2}\right) R_S, \qquad V_{IB} = \max(|V_{IB1}|, |V_{IB2}|)$: Equations 22 and 23: the offset current can split either way, so the worst case evaluates both. SBOA590’s OPA205A example (−2.31 µV and −6.70 µV → 6.70 µV) anchors the tests.
$V_{RTI} = V_{OS} + \frac{dV_{OS}}{dT}\,\Delta T + V_{IB}, \qquad V_{RTO} = V_{RTI}\left(1 + \tfrac{R_F}{R_G}\right)$: Each term is a datasheet bound, so the budget adds them; every input-referred error rides to the output at the noise gain, regardless of the signal gain’s sign.
$R_S = R_F \| R_G \;\Rightarrow\; V_{IB} = \tfrac{I_{OS}}{2}(R_F\|R_G + R_S)$: The classic balance: matched bias currents cancel, leaving only the offset current. SBOA590 warns it off for CMOS and chopper inputs, whose two currents are not matched.

Assumptions

Worst case, not typical: every term uses the datasheet maximum and they are allowed to gang up. A typical unit is far better; a production run contains the worst one.
DC only. Noise, CMRR, PSRR and finite open-loop gain shift the offset too — SBOA590 sections 3.1–3.3 — and belong in a fuller budget for precision front ends.
The circuit is the standard single op-amp inverting or non-inverting stage; the same arithmetic applies to either, since DC errors see the noise gain.
Drift is linear at the datasheet rate over the excursion, from the 25 °C reference point.
Resistor tolerance is a gain error, not an offset, and is not counted here.

What adds up in an op-amp's DC error budget

Every op amp ships with three small lies about zero. The offset voltage is the input the amplifier believes it has when it has none. The drift is that belief changing with temperature. And the bias currents are real currents flowing out of (or into) both inputs, which the surrounding resistors obligingly convert into more offset. None of them matters at all — until the signal being amplified is millivolts and the gain is a hundred, at which point the "zero" at the output is tens of millivolts of fiction.

The method is TI SBOA590's. The two bias currents are written as I_B ± I_OS/2; the inverting input's current works against R_F∥R_G, the non-inverting one against the source resistance, and since the offset current can split either way, the worst case evaluates both splits and keeps the larger. The total then stacks offset, accumulated drift and the bias term — bounds, so they add — and rides the noise gain to the output.

Worked example: SBOA590's own 100 kΩ network

The defaults are SBOA590's own Example 1 network — R_F = 100 kΩ, R_G = 1 kΩ, R_S = 10 kΩ, with the OPA205A's ±0.5 nA bias and ±0.4 nA offset current — plus a representative precision-part offset of 50 µV and 0.5 µV/°C taken over a 60 °C excursion.

R_F ∥ R_G = 100k ∥ 1k                        = 0.99 kΩ
V_IB1  = (0.7 nA)(0.99k) − (0.3 nA)(10k)     = −2.31 µV
V_IB2  = (0.3 nA)(0.99k) − (0.7 nA)(10k)     = −6.70 µV
V_IB   = worse of the two                     =  6.70 µV

V_OS   =                                        50 µV
drift  = 0.5 µV/°C × 60 °C                   =  30 µV
total  = 50 + 30 + 6.7                        =  86.7 µV  RTI

noise gain = 1 + 100k/1k = 101  →  ±8.76 mV at the output

The instructive part is the ordering. The headline offset spec is barely half the budget; the drift term — which nobody reads past the first page for — is 30 µV of it, and would dominate entirely over an automotive range. And the bias term, small here, scales with every kilohm of source resistance: the same amplifier behind a 1 MΩ sensor divider turns 0.7 nA into 700 µV and the budget is suddenly the bias current's.

Where the DC error budget stops being valid

This is the DC floor, not the whole error budget. Gain error from resistor tolerance, common-mode and supply rejection, finite open-loop gain, and noise all sit on top — SBOA590 sections 3.1 through 3.3 give each of them the same ΔV_OS treatment when a fuller stack-up is needed. For a filter stage the AC behaviour is theactive filter tool's department.

The balancing resistor deserves its reputation and its warning label in equal measure. With a matched bipolar input stage, setting R_S = R_F∥R_G cancels the common part of the bias currents and leaves only the offset current. SBOA590 is blunt about the modern case: CMOS and chopper inputs have unmatched currents, balancing may not help, and it can make the error worse — while adding a resistor whose own noise is not free.

Worst-case addition is deliberate. The three terms are independent datasheet bounds, and one shipped unit is allowed to sit at the corner of all of them. Statistical addition flatters the numbers and then loses the argument with the one board that comes back from the field.

Common op-amp offset mistakes

Reading the typical column. Typical offset is the median of a distribution the buyer does not get to choose from; the max column is the contract.
Ignoring drift because 25 °C looked fine. 0.5 µV/°C is an innocent number until 60 °C of excursion makes it the largest term on the page.
High-value resistors around a bipolar input. Bias current times source resistance is an offset; megohm networks belong with pA-class CMOS or JFET inputs.
Adding the balance resistor by reflex. On a CMOS input it cancels nothing, adds noise, and moves the error in whichever direction the unmatched currents choose.
Confusing signal gain with noise gain. An inverting stage at −1 has a noise gain of 2: DC errors are amplified by 1 + R_F/R_G no matter which way the signal goes.