ADC noise floor calculator
An ideal N-bit converter's SNR is 6.02N + 1.76 dB over dc to fs/2: 74 dB for 12 bits. The noise floor on an FFT plot sits a further 10 log10(M/2) below that, because each bin is only fs/M wide — 107 dB for a 4096-point FFT. That floor is not the SNR, and confusing the two is the mistake this page exists to prevent. Enter the resolution, the sample rate and, if you have them, the measured SNR and THD; get the noise in volts and nV/√Hz, the in-band SNR after process gain, the FFT floor, SINAD, ENOB, and the SNR ceiling your clock jitter imposes.
Resolution. Each bit is 6.02 dB of ideal SNR; the 1.76 dB on top is the ratio of a full-scale sine's rms to the quantization noise's, and does not depend on N.
Sample rate. The quantization noise is spread across dc to fs/2 whatever fs is, which is what process gain and the spectral density both come from.
FFT length, for the floor a spectrum plot shows. Leave at 0 to skip. The floor is not the SNR: each bin is only fs/M wide, so it sits 10 log10(M/2) further down.
The bandwidth the signal actually occupies after digital filtering. Leave at 0 for the full Nyquist band. Narrowing it raises the in-band SNR by 10 log10(fs/2BW) — MT-001's process gain.
The converter's measured SNR over dc to fs/2, from the datasheet or an FFT. Leave at 0 to use the ideal N-bit figure. Real parts are a few dB under it.
Total harmonic distortion as a positive number of dB below the signal. Leave at 0 to ignore it. With SNR it gives SINAD, and SINAD is what ENOB is computed from.
Full-scale input span, peak to peak. Only needed for the results in volts — the LSB, the rms noise, and the density.
How far below full scale the test signal was, in dB. MT-003 Eq 2 adds it back so ENOB is quoted at full scale whatever level was used.
rms jitter of the sampling clock. Leave at 0 to skip. Together with the input frequency it sets an SNR ceiling of its own that has nothing to do with resolution.
The analog input frequency the jitter acts on. The limit is 20 log10(1 / 2π f t_j); it falls 6 dB for every doubling of either.
- Ideal SNR, 12 bits, dc to fs/2
- 74.0 dB
- 1 LSB · quantization noise, rms
- 488 µV · 141 µV
- Noise implied by 74.0 dB · density
- 141 µV rms · 22.3 nV/√Hz
- FFT noise floor, 4096 points
- 107 dB below full scale (SNR + 33 dB)
- ENOB
- 12.00 bits
How this is calculated
Standard: ADI MT-001 (Kester) Eq 4, 9, 10; MT-003 Eq 1, 2, 12; MT-031 Eq 4
- rms quantization noise, from a sawtooth error of peak-to-peak amplitude one LSB. MT-001 Eq 4.
- Full-scale sine against the quantization noise. The 1.76 dB is 20 log10 of √(3/2) and does not depend on N. MT-001 Eq 9.
- Process gain: the noise outside the signal bandwidth is filtered away. MT-001 Eq 10.
- The FFT is a spectrum analyser of bandwidth fs/M. This is the average floor of the plot, not the converter's SNR. MT-001 p. 6, MT-003 p. 1.
- Noise and harmonic distortion combine root-sum-square. MT-003 Eq 12.
- The SNR formula solved for N with SINAD in place of SNR, corrected to full scale for a smaller test signal. MT-003 Eq 1 and 2.
- The SNR of a perfect converter whose only noise is sampling-clock jitter. MT-031 Eq 4.
- Noise spectral density, derived: MT-001 states the quantization noise is spread uniformly over dc to fs/2, so its density is the rms over the square root of that bandwidth.
Assumptions
- The quantization error is uncorrelated with the input, so it behaves as white noise across dc to fs/2. MT-001 shows when that fails: a sampling clock that is an exact multiple of the input frequency.
- Full-scale sinusoidal input for the SNR and ENOB definitions; MT-003 Eq 2 corrects for a smaller sine, not for other waveforms.
- Measured SNR is over the Nyquist bandwidth and excludes harmonics; THD is the first five harmonics. Some datasheets label SINAD as SNR.
- Process gain assumes a digital filter that actually removes the out-of-band noise.
- The jitter figure is the root-sum-square of clock and aperture jitter, and the limit it gives is for that alone — combined with quantization noise root-sum-square here.
- Differential nonlinearity, thermal noise in the front end and reference noise are not modelled. A real converter sits below the ideal line for those reasons; the measured SNR field is where they enter.
What sets an ADC's noise floor
An ideal converter's only noise is quantization: the ±½ LSB it is allowed to be wrong by. MT-001 models that error as a sawtooth of peak-to-peak amplitude q, one LSB, and its rms value is q/√12. Against a full-scale sine whose rms is 2Nq / 2√2, the ratio comes out as 6.02N + 1.76 dB — and MT-001's insistence is that the figure is definedover dc to fs/2. That bandwidth is what the two corrections below act on.
The first is process gain. The quantization noise is spread across the whole Nyquist band; if the signal occupies less and a digital filter removes the rest, the in-band SNR rises by 10 log10(fs/ 2BW). The second is the FFT floor, which is the one that confuses people: an FFT is a spectrum analyser with a bandwidth of fs/M, so its average floor sits 10 log10(M/2)below the converter's noise. The floor on a plot is not the SNR. Averaging FFTs does not lower it; a longer FFT does.
Real converters add distortion, and MT-003 defines how the pieces combine: SINAD is noise and harmonics together, root-sum-square, and ENOB is the SNR formula solved for N with SINAD substituted. A jittery clock adds a third floor of its own, MT-031's 20 log10(1 / 2πf tj), which depends on the input frequency and not at all on the resolution.
Worked example: an ideal 12-bit ADC and a 4096-point FFT
The defaults are MT-001 Figure 6: 12 bits at 80 MSPS with a 2 V span, analysed with a 4096-point FFT.
1 LSB q = 2 V / 2¹² = 488 µV
rms quantization noise q / √12 = 141 µV
full-scale rms 2 V / 2√2 = 707 mV
SNR 20 log(707 mV / 141 µV) = 74.0 dB (6.02 × 12 + 1.76)
FFT process gain 10 log(4096 / 2) = 33.1 dB
FFT noise floor 74.0 + 33.1 = 107 dB below full scale
noise density 141 µV / √(40 MHz) = 22.3 nV/√Hz
The calculator reports 74.0 dB, 33 dB and 107 dB, which are MT-001's numbers. MT-003 repeats the exercise with M = 8192 and gets 36 dB and 110 dB; enter 8192 and so does the tool. For a real part, MT-003's AD9444 at 80 MSPS measures SNR 73.42 dB and THD 86.31 dB: enter both and SINAD comes out at 73.20 dB and ENOB at 11.87 bits, against a 14-bit label — the document's own tabulated values.
Where the noise floor model stops being valid
- Quantization noise is only white if it is uncorrelated.MT-001 shows an ideal 12-bit converter whose sampling clock is exactly 40 times the input frequency: the rms noise is still q/√12, but it collects into harmonics of the signal, and the apparent SFDR drops from 93 to 77 dBc. Test with an input frequency that is not a sub-multiple of fs, or add dither.
- Process gain needs the filter to exist. The in-band SNR is what the digital filter delivers; a converter with nothing after it has the Nyquist-bandwidth figure and no more.
- The FFT floor is a measurement artefact, not a property of the ADC. It is the number to compare a spur against on a plot, and it must be low enough for the distortion products to stand clear of it. It is not a noise figure to design a signal chain around.
- ENOB from SINAD assumes a full-scale sine. MT-003 Eq 2 corrects for a reduced input; with a non-sinusoidal signal the correction is not defined and the figure is a comparison between parts, not an absolute.
- The jitter equation is the clock alone. It is the SNR of a perfect, infinite-resolution converter whose only fault is timing. MT-031 notes the tj to use is the root-sum-square of the external clock's jitter and the converter's internal aperture jitter.
- Datasheet SNR and SINAD are sometimes swapped.MT-003: "A few ADC data sheets somewhat loosely refer to SINAD as SNR." If the figure was measured with harmonics included, entering it as SNR double-counts the distortion once THD is added.
Common ADC noise mistakes
- Reading the FFT floor as the SNR. A 12-bit converter that shows a 107 dB floor has 74 dB of SNR; the other 33 dB is the FFT's bin width.
- Expecting averaging to lower the floor. It smooths the floor's texture and changes its mean not at all; only a longer FFT moves it.
- Quoting 6.02N + 1.76 as if a part achieves it. It is the ceiling for N bits; real converters sit a few dB under, and ENOB is the honest resolution.
- Sizing resolution while ignoring the clock. At 100 MHz input, 1 ps of jitter caps SNR at 64 dB — a 10-bit figure — and no number of bits in the converter changes that.
- Comparing in-band SNR from one datasheet with Nyquist-band SNR from another. The process-gain term can be 30 dB; the bandwidth has to be stated before two figures mean the same thing.
Further reading
- ADI, MT-001 — Taking the Mystery out of the Infamous Formula, "SNR = 6.02N + 1.76dB," and Why You Should Care: the quantization-noise derivation, process gain, and the FFT floor.
- ADI, MT-003 — Understand SINAD, ENOB, SNR, THD, THD + N, and SFDR: the definitions, ENOB, and how SNR and THD combine into SINAD.
- ADI, MT-031 — Grounding Data Converters, sampling-clock section: the jitter-limited SNR and its worked example.
- The charge-bucket settling calculator handles the other half of a SAR front end — whether the sample capacitor settles inside the acquisition window — with the same half-LSB criterion.