100nF

LDO dissipation and junction temperature

What a linear regulator turns into heat, how hot its junction runs at the θJA it actually has, the θJA the design would need to stay inside its limit, and roughly how much copper buys that — plus the dropout check that decides whether it regulates at all.

Ta 50 °CTj 101 °CTj max 125 °Crise = θJA × 855 mW
Fig 1 — 855 mW of dissipation lifts the junction from 50 °C ambient to 101 °C, against a 125 °C limit.
Dissipation
855 mW · efficiency 66 %
Junction temperature
101.3 °C (23.7 °C of margin)
Max load at this θJA
732 mA before Tj reaches 125 °C
Required θJA
87.7 °C/W to hold 125 °C at this load
Copper area for that
about 6.4 cm² of solid pour, both sides, still air
Headroom
1.70 V above the output · dropout needs 0.30 V

How this is calculated

Standard: TI SNVA419 (AN-2020) — Thermal Design By Insight, Not Hindsight

PD=(Vin−Vout)⋅Iout+Vin⋅IqP_D = (V_{in} - V_{out}) \cdot I_{out} + V_{in} \cdot I_q
The power balance: everything that enters and does not leave is heat. The pass element drops the headroom at the load current; the ground-pin current burns the full input voltage.
TJ=TA+θJA⋅PDT_J = T_A + \theta_{JA} \cdot P_D
SNVA419’s single-resistor model: the junction sits above ambient by the dissipation times the junction-to-ambient thermal resistance.
θJA,req=TJ,max−TAPD\theta_{JA,req} = \frac{T_{J,max} - T_A}{P_D}
The required-θJA method of SNVA419 section 2.1: its example turns a 40 °C allowed rise at 0.94 W into a 42.5 °C/W target.
A  ≥  500  °C⋅cm2/WθJA−θJCA \;\geq\; \frac{500 \;\text{°C·cm}^2/\text{W}}{\theta_{JA} - \theta_{JC}}
Rule 1 of SNVA419: the board area that reaches a target θJA with solid copper pours on both sides in still air. Airflow can roughly halve it.
η=VoutIoutVin(Iout+Iq)\eta = \frac{V_{out} I_{out}}{V_{in}(I_{out} + I_q)}
The efficiency an LDO is allowed: bounded by the voltage ratio no matter how good the silicon is.

Assumptions

What sets an LDO's junction temperature

A linear regulator is a resistor with feedback. Every volt between input and output is dropped across the pass element at the full load current, and the ground-pin current burns the entire input voltage on top. None of that is a defect — it is the price of the quiet output — but it all surfaces as junction temperature, and the junction does not care that the schematic looked innocent.

The model is TI AN-2020's single resistor: the junction sits θJA·P above ambient. The tool runs it in both directions — the temperature this part reaches with the datasheet θJA, and the θJA the design would need to hold its limit — and then applies AN-2020's Rule 1 to say what that target costs in copper: 500 °C·cm²/W divided by the thermal headroom, solid pours both sides, still air.

The catch the θJA article is about applies with full force here: the datasheet number was measured on a JEDEC board, and yours is not one. Treat the Tj row as an estimate whose error bar is your layout, and the required-θJA row as the specification your layout has to meet.

Worked example: 5 V to 3.3 V at 500 mA in a 50 °C box

The defaults: 5 V in, 3.3 V out at 500 mA, 1 mA ground current, a SOT-223-class θJA of 60 °C/W, 50 °C inside the box, 125 °C allowed.

P_D     = (5 − 3.3) × 0.5 + 5 × 0.001    = 0.855 W
η       = 1.65 / 2.505                    = 66 %

T_J     = 50 + 60 × 0.855                 = 101.3 °C   (23.7 °C of margin)
I_max   = (75 / 60 − 0.005) / 1.7         = 732 mA at this θJA

θJA req = 75 / 0.855                      = 87.7 °C/W
area    = 500 / (87.7 − 10)               = 6.4 cm²  of two-sided pour

This one lives, with margin. Move the same part to a 12 V rail and the arithmetic turns on it: PD = 4.36 W, the junction "reaches" 311 °C — which is to say the part hits thermal shutdown long before — and the required θJA of 17 °C/W is beyond what any amount of board copper reaches on this package. That design needs a switcher in front, which is what the efficiency row has been hinting at.

Where the thermal model stops being valid

Steady state only. A regulator that sees 2 A for 100 ms every few seconds is a thermal-mass problem, and this model will condemn designs that are actually fine. Conversely, still air is load-bearing: seal the board in a potted enclosure and Rule 1's constant is optimistic.

θJA is not a property of the package alone. An exposed-pad part with the pad soldered to a stitched plane can halve its datasheet number; the same part with the pad floating can double it. The via stitching that makes the difference is thevia calculator's territory — AN-2020 puts a single 12-mil thermal via at 261 °C/W, which is why they come in arrays.

The dropout row is a gate, not a fine measurement. Dropout rises with load and temperature, and a design that clears it by 50 mV at 25 °C may not at 85 °C. When the headroom is thin, check the datasheet curve, not just this number.

Common LDO thermal mistakes

Further reading