100nF

Pull-up and pull-down resistor calculator

A pull-up or pull-down resistor has a maximum set by leakage — the released node must still reach the reader's VIH or VIL through the drop the leakage makes across it — and a minimum set by the driver, which must not sink more than the current its output level is specified at. For TI's example, a 1.8 V power-good line with 1.1 µA of leakage into a 1.0 V threshold and a 1 mA driver, that is 1.8 kΩ to 727 kΩ; 36 kΩ in the middle gives a 4 µs edge into 50 pF and 90 µW while held low. Enter the rail, the leakages, the threshold and the driver's test current for the range, a suggested value or a check of yours, and the edge and power that come with it.

1.80 V0V_IH 1.00 VR_min 1.80 kΩR_max 727 kΩ36.0 kΩ · edge 3.96 µsresistor, log scale — released-node voltage against it
Fig 1 — The released node sags as the leakage flows through a larger resistor and crosses the input threshold at 727 kΩ; below 1.80 kΩ the driver cannot hold the asserted level. 36.0 kΩ sits between them with a 3.96 µs released edge into 50.0 pF.
Range: minimum (driver) · maximum (leakage)
1.80 kΩ · 727 kΩ
Suggested value, E24
36.0 kΩ
Released node through 36.0 kΩ
1.76 V against V_IH 1.00 V
Released edge, 10–90 %, into 50.0 pF
3.96 µs
While asserted: current · power
50.0 µA · 90.0 µW
At the ends: edge at R_max · power at R_min
80.0 µs · 1.80 mW

How this is calculated

Standard: TI SLVA485; TI SDAA246

Irel=ILKG+IINI_{rel} = I_{LKG} + I_{IN}
SLVA485 eq 1 / 10: the current through the resistor when the driver has released the node.
Rmax=VCC−VIH,minIrel  (pull-up),Rmax=VIL,maxIrel  (pull-down)R_{max} = \frac{V_{CC} - V_{IH,min}}{I_{rel}} \;\text{(pull-up)}, \qquad R_{max} = \frac{V_{IL,max}}{I_{rel}} \;\text{(pull-down)}
SLVA485 eq 2 / 11: the released node at the reader's threshold.
Rmin=VCCItest−IINR_{min} = \frac{V_{CC}}{I_{test} - I_{IN}}
SLVA485 eq 3–4 with the asserted node at the rail; SDAA246 eq 3 is the same without I_IN.
t10−90=2.2 R Ct_{10-90} = 2.2\, R\, C
SDAA246 eq 2: the released edge.
P=VCC2RP = \frac{V_{CC}^2}{R}
SDAA246 eq 5, SCEA094: the resistor while the node is asserted.
Rpick=RminRmaxR_{pick} = \sqrt{R_{min} R_{max}}
The geometric middle, snapped to E24 — this tool's suggestion, not a vendor rule.

Assumptions

What sets a pull-up or pull-down resistor's value

A pull resistor defines the level of a node when nothing is driving it. An open-drain output can only pull low; a pull-up supplies the high. An input left floating reads whatever it picks up; a pull-down makes it read 0. The value is bounded from both ends, and TI's SLVA485 works the two bounds for the common cases — a power-good output driving an enable pin, and a supervisor's reset output driving a processor.

The upper bound comes from leakage. When the driver has released the node, its off-state leakage and the input current of whatever reads the node both flow through the resistor and drop voltage across it. SLVA485 sums the two currents (its eq 1) and sets the node at the reader's VIH, "the minimum voltage that is specified to be read as a logic high" (eq 2); any larger resistor and "the subsequent chip would not recognize the PG voltage as being a logic high". For a pull-down the same sum sets the node at VIL.

The lower bound comes from the driver. When it asserts the node it sinks the resistor's current, and its output level is only specified up to the test current in its datasheet — IOL for an open-drain low. SLVA485 makes the point that the asserted node "could be 0 V which would result in a higher current", so the resistor sees the whole rail. Any smaller resistor and "the voltage drop across Q1 is higher and no longer ensured". SDAA246 writes it as Rmin = VOUT / IOL: 90 Ω for a 1.8 V node with a 20 mA driver.

Between the two bounds the choice is the trade SDAA246 names in its summary: "a larger resistor can reduce power consumption but increase the rise time." The asserted node burns V²/R in the resistor for as long as it is held; the released edge is passive, an RC into the node's capacitance, with a 10–90 % time of 2.2·R·C (SDAA246 eq 2). SLVA485 §6 adds the third force against a large value: "a higher impedance net which is more susceptible to picking up noise from other nearby signals on the board". The calculator's suggestion is the geometric middle of the range, which is where those pressures balance for a node with no particular speed or power requirement.

Worked example: SLVA485's power-good pull-up on 1.8 V

The calculator's defaults. A TPS62067's power-good output, open-drain, drives another TPS62067's enable input from a 1.8 V rail. From the two datasheets, as SLVA485 tabulates them: PG leakage 100 nA maximum, IOL 1 mA, VOL 0.3 V maximum; EN input 1 µA maximum at VIH 1.0 V minimum.

released:  I = 100 nA + 1 µA                 = 1.1 µA
           R_max = (1.8 − 1.0) / 1.1 µA      = 727 kΩ
asserted:  R_min = 1.8 V / (1 mA − 1 µA)     = 1.80 kΩ

middle:    √(1.8 kΩ × 727 kΩ)               = 36 kΩ (E24)
           released node  1.8 − 1.1 µA × 36 kΩ = 1.76 V   (V_IH is 1.0 V)
           edge, 50 pF    2.2 × 36 kΩ × 50 pF  = 4.0 µs
           asserted       1.8 V / 36 kΩ        = 50 µA, 90 µW

10 kΩ:     edge 1.1 µs, 180 µA, 324 µW        — the usual choice, in range

The range is four hundred to one, which is why "10 kΩ" is so often right without anyone calculating it: almost anything sits inside. The calculation matters at the edges — a fast edge with a heavy node, a battery product where 180 µA through a pull-up that is asserted most of the time is the biggest load on the board, or a leaky driver at temperature into a reader with a high VIH, where the range closes.

Where the pull-resistor model stops being valid

Common pull-resistor mistakes

Further reading