Pull-up vs pull-down resistors: which one, and what value

A pull-up resistor connects a node to the supply so that it reads high when nothing is driving it; a pull-down connects it to ground so that it reads low. That is the whole distinction, and the choice between them is made by the driver, not the resistor: an open-drain output can only pull a node low, so it needs a pull-up to supply the high; an output that can only source needs a pull-down; an input that nothing drives at all needs whichever level it should rest at. The value is a range, bounded at the top by leakage and at the bottom by what the driver can sink, and TI’s SLVA485 works both bounds for the two commonest cases. For its power-good example the range is 1.8 kΩ to 727 kΩ, four hundred to one, which is the real reason 10 kΩ is so often right without anyone calculating it. The pull-up and pull-down calculator does the calculation for the cases where it matters; this article is which, when and why.

Which: the driver decides

Pull-up when the output is open-drain or open-collector — a transistor to ground and nothing else. SDAA246 describes why such outputs exist: they “are appropriate for signals that idle high and do not switch often, such as status lines or interrupts; as these signals consume virtually no power when the signal is high, and the signals can be tied together at the outputs without danger of bus contention.” I²C, interrupt lines, power-good and reset-low outputs, and anything shared between chips at different supply voltages are pull-up cases: the resistor goes to whichever rail the reader wants, and the driver never has to source it.

Pull-down when the output can only source, or when an input must read low by default: an active-high reset that must not assert while the supervisor is unpowered, a mode pin sampled at boot, an enable that should stay off until something deliberately drives it. SLVA485’s second example is a supervisor whose reset output “connects to ground through a pull-down resistor” so that the processor’s reset input is low whenever the output is released.

Neither when the output is push-pull — it drives both levels itself, and a resistor only adds current in one state — and never both on the same node, which makes a divider with a floating input in the middle.

Internal pull-ups in microcontrollers are the same thing with worse numbers: tens of kilohms, loosely specified, and disabled during reset, which is exactly when a default level matters. They are fine for a button on a short trace. They are not fine for a node with a leaky driver on it, or a long one, and the reason is the next section.

What value: the top of the range is leakage

When the driver has released the node, two currents still flow through the resistor: the driver’s own off-state leakage, and the input current of whatever reads the node. SLVA485 adds them (its equation 1) and notes that “this leakage current creates a voltage drop across the pull-up resistor. Thus, the voltage on the PG pin and on the subsequent EN input is less than V_out.” The node must still read as a high, so the resistor’s upper limit is the one that puts the node exactly at the reader’s V_IH:

$R_{max} = \frac{V_{CC} - V_{IH,min}}{I_{LKG} + I_{IN}}$

“Choosing a larger resistor would result in a larger voltage drop across R_Pull-up which would cause V_PG to be lower than the minimum value of V_IH. In other words, the subsequent chip would not recognize the PG voltage as being a logic high.” For a pull-down the same two currents lift the node above ground and the limit is V_IL,max over the sum.

For the TPS62067 example — 100 nA of power-good leakage, 1 µA into the enable input, V_IH of 1.0 V on a 1.8 V rail — that is 0.8 V over 1.1 µA: 727 kΩ. For the TL7759 reset pull-down into a processor — 1 µA plus 100 nA against a 0.3 V V_IL — it is 273 kΩ. Both are far above anything anyone fits, which is the point: the top of the range only bites when the leakage is large (a hot part, several outputs OR’d onto the node) or the threshold is close to the rail.

The bottom of the range is the driver

When the driver asserts the node it has to sink (or source) the resistor’s current, and its output level is only specified up to a test current. SLVA485: “setting the maximum current through Q1 equal to the current used in the test condition in the datasheet gives known performance, meaning V_OL will not exceed its specified maximum voltage at that current.” Below that resistance “the voltage drop across Q1 is higher and no longer ensured.” The note also says which voltage to put across the resistor — the datasheet’s V_OL is the maximum the pin reaches, “but it could be 0 V which would result in a higher current” — so the conservative bound is the whole rail over the test current:

$R_{min} = \frac{V_{CC}}{I_{OL}}$

which SDAA246 writes exactly that way and evaluates for a 1.8 V node with a 20 mA driver: 90 Ω. For the TPS62067’s 1 mA power-good output on 1.8 V it is 1.8 kΩ; for the TL7759’s 8 mA reset output on 5 V, 625 Ω at the rail, or the 500 Ω SLVA485 quotes with the transistor’s 1 V saturation taken off.

The two limits are usually two or three decades apart. Inside them the level is guaranteed at both ends, and the choice is about what the resistor costs.

Inside the range: edge, power, noise

SDAA246 states the trade in its summary: “a larger resistor can reduce power consumption but increase the rise time.” The asserted node burns V²/R in the resistor for as long as it is held — its equation 5 sums that over every output that is low at once — and the released edge is passive: “the output rise time depends on the value of the pullup resistor and the load capacitance, including pin capacitance and trace capacitance”, an RC with a 10–90 % time of 2.2·R·C. The driven edge is not affected; “an open-drain device passively releases the output high, but the device actively pulls the output low”, which is why open-drain edges are asymmetric.

SDAA246’s comparison of its 90 Ω minimum against 9 kΩ is “100 times faster rise time” for the smaller resistor, which follows from 2.2·R·C; it goes on to say “a 10,000 times increase in power consumption”, which V²/R does not give — the ratio is 100, the same as the rise time, and the note’s own equation 5 says so. The trade is one-for-one on a log scale: ten times the resistor is ten times the edge and a tenth of the power.

SLVA485’s section 6 adds the third consideration, against the high end: “larger resistances create a higher impedance net which is more susceptible to picking up noise from other nearby signals on the board that happen to couple to it. This is especially a concern for lengthy open drain outputs routed over a long distance.” A 500 kΩ pull-up on a front-panel cable is an antenna with a threshold on the end of it.

The middle of the range on a log scale — the geometric mean, 36 kΩ for the power-good example — is where none of the three dominates, and the calculator suggests it. Move toward the low end for a fast edge or a noisy environment, toward the high end for a battery product whose node spends its life asserted.

Worked numbers

SLVA485’s power-good case, on the calculator’s defaults:

rail 1.8 V; PG leakage 100 nA, EN input 1 µA, V_IH 1.0 V; I_OL 1 mA; node 50 pF

released    I = 1.1 µA          R_max = (1.8 − 1.0) / 1.1 µA   = 727 kΩ
asserted    I_OL = 1 mA         R_min = 1.8 / (1 mA − 1 µA)    = 1.80 kΩ

36 kΩ (middle)   node released 1.76 V   edge 4.0 µs   asserted 50 µA, 90 µW
10 kΩ            node released 1.79 V   edge 1.1 µs   asserted 180 µA, 324 µW
1 kΩ             below R_min: 1.8 mA through a 1 mA output — V_OL no longer specified
1 MΩ             above R_max: node released at 0.7 V — reads low with nothing driving it

Both wrong answers are wrong in the way SLVA485 describes, and both are values people fit: 1 kΩ “to be safe”, and a megohm “to save power”. The range in between is wide, and 10 kΩ is inside it for almost every logic node on a board — which is why it is the default, and why the calculation is only needed when something is unusual: a heavy node, a leaky driver, a tight threshold, or a current budget measured in microamps.