100nF

Switch debounce: the RC, the Schmitt trigger and the numbers

A switch bounces up to 10 ms; logic answers in nanoseconds. Würth's RC and a Schmitt input fix it, but the 1 µF crosses the SN74HC14's threshold mid-bounce.

A mechanical switch does not close once. Würth Elektronik’s support note on the subject describes the spring inside a tact switch arriving at its position and rebounding “due to the principles of elastic shock”, an effect that “occurs several times in succession until the movement is completely damped”. For its own tact, push-button and detector switches Würth specifies the bounce time as 10 ms. TI’s note on the same problem puts it in one sentence: switches “can bounce for hundreds of microseconds after being pressed, while most logic devices respond in just a few nanoseconds”. To a microcontroller pin, every bounce is a separate press.

The standard fix is a resistor-capacitor filter feeding a Schmitt-trigger input, and the standard way to size it is a rule of thumb: a time constant about equal to the bounce time (Würth), or about half the desired debounce delay (TI). Both work most of the time. Neither says what the circuit actually does at the input’s threshold, and the threshold of a real Schmitt input is not a number but a range. For Würth’s example values — 1 kΩ, 10 kΩ, 1 µF on 5 V — the capacitor crosses an SN74HC14’s negative-going threshold anywhere between 7.1 and 17.1 ms after a press depending on the unit and the temperature, and its positive-going threshold between 4.1 and 10.8 ms after a release. Against a 10 ms bounce, the low ends of both ranges are inside it. The switch debounce calculator computes those crossings from the datasheet limits and sizes the capacitor so the soonest one lands after the bounce; this article is the derivation, and why the worst-case threshold is the one that matters.

Schematic: a pull-up resistor R1 from V_CC to a node; a push-button switch from that node to ground; a resistor R2 from the node to a second node with capacitor C to ground; an optional diode drawn across R2 with its cathode toward the capacitor; and a Schmitt-trigger inverter whose input is the capacitor node and whose output is labelled to the microcontroller.
Fig 1 — The debounce circuit of Würth SN015 figure 7, with the diode of its figure 9 (dashed, optional) and the Schmitt buffer of figure 10. A press discharges C through R2 alone; a release charges it through R1 + R2, or through R1 alone when the diode is fitted.

The circuit

Würth’s figure 7 is the circuit everyone draws. R1 pulls the switch node up to VCC; the switch shorts that node to ground; R2 connects the node to the capacitor, and the capacitor node is the output. Würth explains the two paths: “when the switch is open the capacitor charges through R1+R2 which causes the voltage to rise more slowly. When the switch is closed, the capacitor is discharged through R2 at a controlled rate.”

τrelease=(R1+R2) Cτpress=R2 C\tau_{release} = (R_1 + R_2)\,C \qquad \tau_{press} = R_2\,C

R2 is the part people leave out. Without it, a press connects the charged capacitor straight across the contact — a current limited by nothing but the contact’s own resistance, which erodes it — and the press edge has no delay at all, only the release does. R1 sets the current the switch carries while held, VCC/R1, which is why Würth chooses 1 kΩ “to limit current” and TI’s note reminds that the resistor’s power is V²/R.

The Schmitt buffer is the other half. Würth: logic “is defined with zero being below a certain voltage (ie. 0.8 V) and one being above a certain voltage (ie. 2.5 V). The values between are undefined. If the application cannot support the undefined values a Schmitt trigger buffer with hysteresis may be required.” An RC ramp spends milliseconds in that undefined band, and a plain CMOS input will produce edges from any noise while it does. A Schmitt input has two thresholds, VT+ going up and VT− going down, and TI’s SN74HC14 datasheet gives the hysteresis between them, ΔVT(min), as “the peak-to-peak limit” for noise the input ignores: 0.4 V at 4.5 V.

Where the delay comes from

Take a press. The capacitor was at VCC; the contact closes and the capacitor discharges through R2 toward zero. The output flips when it reaches VT−:

tpress=R2Cln⁡VCCVT−t_{press} = R_2 C \ln \frac{V_{CC}}{V_{T-}}

Take a release. The capacitor was at zero; the contact opens and the capacitor charges through R1 + R2 toward VCC, flipping the output at VT+:

trelease=(R1+R2) Cln⁡VCCVCC−VT+t_{release} = (R_1 + R_2)\,C \ln \frac{V_{CC}}{V_{CC} - V_{T+}}

The debounce works when each of these is longer than the bounce: the capacitor has not reached the threshold while the contact is still chattering, and after it has, the hysteresis absorbs the small recharge a late bounce produces. During a bounce the capacitor does not sit still — it recharges a little through R1 + R2 each time the contact opens — but with the open intervals a fraction of the time constant the kinks are small, and the crossing is a single event.

Two traces over 25 milliseconds after a press. The upper trace is the switch node: it drops to zero at the press, then flips back to five volts and down again five times with lengthening intervals over the first ten milliseconds, then stays at zero. The lower trace is the capacitor voltage: it falls from five volts along an exponential, with small upward kinks at each bounce, crosses the Schmitt threshold band once, and continues to zero. Vertical marks show where the capacitor would cross the highest and lowest threshold.
Fig 2 — A press with 10 ms of bounce into SN015's 1 kΩ / 10 kΩ / 1 µF on 5 V. The switch node (top) makes ten extra edges; the capacitor (bottom) makes one crossing, because it discharges through R2 while the contact is closed and recharges only a little through R1 + R2 in each open interval. With this pattern it reaches the 2.45 V limit at 12.6 ms and the typical 1.6 V at 16.9 ms — later than the 7.1 and 11.4 ms of a contact that closes solidly, because every open interval gives some charge back. The solid closure is the worst case the calculator uses; a real bounce lands anywhere between. The pattern is a stated model, the response is integrated from it.

The logarithm is where the threshold enters. For Würth’s values, τpress is 10 ms and τrelease 11 ms, so far so familiar; but the press reaches a typical VT− of 1.6 V at 10 ms × ln(5/1.6) = 11.4 ms, and the release reaches a typical VT+ of 2.5 V at 11 ms × ln(5/2.5) = 7.6 ms. Neither is “one time constant”, because one time constant is 63 % of the swing (Würth’s eq 3) and neither threshold is at 63 %.

The threshold is a range, and the wrong end is the one that bites

The SN74HC14’s electrical characteristics at VCC = 4.5 V give VT+ as 1.55 V minimum, 2.5 V typical, 3.13 V maximum over temperature, and VT− as 0.9, 1.6 and 2.45 V. The datasheet’s guidance for driving the input is written for the outer limits: an input “must cross Vt−(min) to be considered a logic LOW, and Vt+(max) to be considered a logic HIGH”. That is the right rule for guaranteeing a logic level. It is the wrong end for the debounce.

A falling capacitor reaches a high VT− first. The unit whose VT− sits at the 2.45 V limit flips at 10 ms × ln(5/2.45) = 7.1 ms, not 11.4; the unit at 0.9 V flips at 17.1 ms. A rising capacitor reaches a low VT+ first: at the 1.55 V limit the release flips at 11 ms × ln(5/3.45) = 4.1 ms, at 3.13 V at 10.8 ms. The soonest crossing is the design case, because it is the one that can land inside the bounce, and for the HC14 it is 40 % sooner than the typical figure on both edges.

Against Würth’s 10 ms, the 1 µF example gives 0.71 × the bounce on the press and 0.41 × on the release. Würth’s values are correct for what Würth says they are — a time constant equal to the bounce, and a note that “resistance and capacitance values could vary according to customer circuit design” — but they are a starting point, not a margin. TI’s rule of thumb is the more conservative one: “time constant should be approximately half of the desired debounce time”, so a 10 ms bounce wants a delay of 20 ms, which TI notes is also about where “humans” start to “notice the delay” — so the rule is not to go much further either.

Log-log plot of delay against capacitance from 100 nanofarads to 10 microfarads for R1 of 1 kilohm and R2 of 10 kilohms. Four rising straight lines: the press delay at the typical threshold, the press at its soonest, the release at its soonest, and the release at its latest. Horizontal dashed lines mark 10 milliseconds, the bounce time, and 20 milliseconds, twice it. The soonest release line crosses 20 milliseconds at about 5 microfarads and 10 milliseconds at about 2.5 microfarads; at 1 microfarad all the lines sit below 20 milliseconds and the two soonest lines below 10.
Fig 3 — The crossing times against capacitance for R1 = 1 kΩ, R2 = 10 kΩ, 5 V into an SN74HC14: the delay is proportional to C, so the plot is straight on log axes. At Würth's 1 µF the soonest release is 4.1 ms and the soonest press 7.1 ms, both under the 10 ms bounce; twice the bounce on both edges needs 4.9 µF. The gap between "soonest" and "typical" is the threshold tolerance, not the resistor's.

Solving for twice the bounce on both edges with the worst-case thresholds,

C≥2×10 ms(R1+R2)ln⁡ ⁣(VCC/(VCC−VT+,min))=20 ms11 kΩ×ln⁡(5/3.45)=4.9 μFC \geq \frac{2 \times 10\ \text{ms}}{(R_1 + R_2)\ln\!\big(V_{CC}/(V_{CC} - V_{T+,min})\big)} = \frac{20\ \text{ms}}{11\ \text{k}\Omega \times \ln(5/3.45)} = 4.9\ \mu\text{F}

and the release edge sets it, since the press with the same capacitor comes out at 39.9 ms soonest. The next E12 value up is 5.6 µF; or keep the capacitor at 1 µF and raise R2 to 56 kΩ, which lengthens both edges and costs nothing but a little more sensitivity to the input’s leakage — TI’s note has the arithmetic for that, V = I × R, and for the HC14’s microamps it is nothing below 100 kΩ.

The diode, and what it gives up

Würth’s figure 9 adds a diode across R2, cathode toward the capacitor. “This allows for a faster transition time to charge the capacitor using R1 and D1 and a different discharge time using only R2.” The release now charges through 1 kΩ instead of 11 kΩ and reaches VT+ in a few hundred microseconds; the press is unchanged. That is what to fit when the release must be quick — a key that must register the instant it is let go — and the release bounce is handled elsewhere, in software or by the hysteresis alone. It is not a debounce of the release; it removes it.

Long wires

A switch on a front panel is a switch on an antenna. Würth’s last section covers it: “if the switch is located far away or at the end of a long wire, there will likely be a need for protection against overvoltage, ESD or other transients. This can be as simple as a ferrite bead and TVS diode in front of the input circuitry.” The RC is not that protection. Its capacitor absorbs some of a transient, but the resistor in front of it is R2 at 10 kΩ, not a clamp, and the HC14’s inputs have absolute maximum ratings a cable can exceed. The TVS article is the sizing.

Worked numbers

Würth’s example into an SN74HC14 on 5 V, using the datasheet’s 4.5 V column:

R1 = 1 kΩ, R2 = 10 kΩ, C = 1 µF, bounce 10 ms

τ_press   = 10 kΩ × 1 µF = 10 ms       τ_release = 11 kΩ × 1 µF = 11 ms

press,   V_T− = 2.45 / 1.6 / 0.9 V     7.1 / 11.4 / 17.1 ms    soonest 0.71 × bounce
release, V_T+ = 1.55 / 2.5 / 3.13 V    4.1 / 7.6 / 10.8 ms     soonest 0.41 × bounce

for 2 × bounce on both edges, same resistors:
C = 20 ms / (11 kΩ × ln(5/3.45)) = 4.9 µF → 5.6 µF (E12)
  press then  39.9 / 63.8 / 96.0 ms;  release 22.9 / 42.7 / 60.6 ms

while held: 5 V / 1 kΩ = 5 mA, 25 mW in R1

The calculator takes the thresholds from the HC14 table at 2, 4.5 or 6 V, or custom values for a microcontroller pin, and judges the margin on the soonest crossing. The latest crossing is worth a glance too: 96 ms is a key that feels slow, and a key that feels slow gets pressed twice.